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rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a adg708/ADG709 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700www.analog.com fax: 781/326-8703 ? analog devices, inc., 2002 cmos, 1.8 v to 5.5 v/ 2.5 v, 3 low voltage 4-/8-channel multiplexers functional block diagrams s1 s8 a0 d a1 a2 adg708 s1a a0 da s4a s1b s4b db en ADG709 1 of 4 decoder en 1 of 8 decoder a1 features 1.8 v to 5.5 v single supply 2.5 v dual supply 3 on resistance 0.75 on resistance flatness 100 pa leakage currents 14 ns switching times single 8-to-1 multiplexer adg708 differential 4-to-1 multiplexer ADG709 16-lead tssop package low power consumption ttl-/cmos-compatible inputs applications data acquisition systems communication systems relay replacement audio and video switching battery-powered systems general description the adg708 and ADG709 are low voltage, cmos analog m ultiplexers comprising eight single channels and four differential channels, respectively. the adg708 switches one of eight inputs (s1?8) to a common output, d, as determined by the 3-bit binary address lines a0, a1, and a2. the ADG709 switches one of four differential inputs to a common differential o utput as determined by the 2-bit binary address lines a0 and a1. an en i nput on both devices is used to enable or disable the device. when disabled, all channels are switched off. low power consumption and an operating supply range of 1.8 v to 5 .5 v make the adg708 and ADG709 ideal for battery-powered, portable instruments. all channels exhibit break-before-make switching action preventing momentary shorting when switch ing channels. these switches are designed on an enhanced submicron process t hat provides low power dissipation yet gives high switching speed, very low on resistance, and leakage currents. on resistance is in the region of a few ohms and is closely matched between switches and very flat over the full signal range. these parts can operate equally well as either multiplexers or demultiplexers and have an input signal range that extends to the supplies. the adg708 and ADG709 are available in a 16-lead tssop package. product highlights 1. single-/dual-supply operation. the adg708 and ADG709 are fully speci?d and guaranteed with 3 v and 5 v single- supply and 2.5 v dual-supply rails. 2. low r on (3 ? typical). 3. low power consumption (<0.01 w). 4. guaranteed break-before-make switching action. 5. small 16-lead tssop package.
rev. a ?2? adg708/ADG709especifications 1 (v dd = 5 v 10%, v ss = 0 v, gnd = 0 v, unless otherwise noted.) b version c version e40 c e40 c parameter +25 c to +85 c +25 c to +85 cu nit test conditions/comments analog switch analog signal range 0 v to v dd 0 v to v dd v on resistance (r on )3 3 typ v s = 0 v to v dd , i ds = 10 ma; 4.5 5 4.5 5 max test circuit 1 on resistance match between 0.4 0.4 typ channels ( r on ) 0.8 0.8 max v s = 0 v to v dd , i ds = 10 ma on resistance flatness (r flat(on) ) 0.75 0.75 typ v s = 0 v to v dd , i ds = 10 ma 1.2 1.2 max leakage currents v dd = 5.5 v source off leakage i s (off) 0.01 0.01 na typ v d = 4.5 v/1 v, v s = 1 v/4.5 v; 20 0.1 0.3 na max test circuit 2 drain off leakage i d (off) 0.01 0.01 na typ v d = 4.5 v/1 v, v s = 1 v/4.5 v; 20 0.1 0.75 na max test circuit 3 channel on leakage i d , i s (on) 0.01 0.01 na typ v d = v s = 1 v or 4.5 v; test circuit 4 20 0.1 0.75 na max digital inputs input high voltage, v inh 2.4 2.4 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 0.005 0.005 a typ v in = v inl or v inh 0.1 0.1 a max c in , digital input capacitance 2 2 pf typ dynamic characteristics 2 t transition 14 14 ns typ r l = 300 , c l = 35 pf; test circuit 5 25 25 ns max v s1 = 3 v/0 v, v s8 = 0 v/3 v break-before-make time delay, t d 88 ns typ r l = 300 , c l = 35 pf 11 ns min v s = 3 v; test circuit 6 t on (en) 14 14 ns typ r l = 300 , c l = 35 pf 25 25 ns max v s = 3 v; test circuit 7 t off (en) 7 7 ns typ r l = 300 , c l = 35 pf 12 12 ns max v s = 3 v; test circuit 7 charge injection 3 3 pc typ v s = 2.5 v, r s = 0 , c l = 1 nf; test circuit 8 off isolation e60 e60 db typ r l = 50 , c l = 5 pf, f = 10 mhz e80 e80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; test circuit 9 channel-to-channel crosstalk e60 e60 db typ r l = 50 , c l = 5 pf, f = 10 mhz e80 e80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; test circuit 10 e3 db bandwidth 55 55 mhz typ r l = 50 , c l = 5 pf; test circuit 11 c s (off) 13 13 pf typ f = 1 mhz c d (off) adg708 85 85 pf typ f = 1 mhz ADG709 42 42 pf typ f = 1 mhz c d , c s (on) adg708 96 96 pf typ f = 1 mhz ADG709 48 48 pf typ f = 1 mhz power requirements v dd = 5.5 v i dd 0.001 0.001 a typ digital inputs = 0 v or 5.5 v 1.0 1.0 a max notes 1 temperature range is as follows: b and c versions: e40 c to +85 c. 2 guaranteed by design, not subject to production test. specitcations subject to change without notice.
rev. a ?3? adg708/ADG709 specifications 1 (v dd = 3 v 10%, v ss = 0 v, gnd = 0 v, unless otherwise noted.) b version c version e40 c e40 c parameter +25 c to +85 c +25 c to +85 cu nit test conditions/comments analog switch analog signal range 0 v to v dd 0 v to v dd v on resistance (r on )8 8 typ v s = 0 v to v dd , i ds = 10 ma; 11 12 11 12 max test circuit 1 on resistance match between 0.4 0.4 typ v s = 0 v to v dd , i ds = 10 ma channels ( r on ) 1.2 1.2 max leakage currents v dd = 3.3 v source off leakage i s (off) 0.01 0.01 na typ v s = 3 v/1 v, v d = 1 v/3 v; 20 0.1 0.3 na max test circuit 2 drain off leakage i d ( off) 0.01 0.01 na typ v s = 3 v/1 v, v d = 1 v/3 v; 20 0.1 0.75 na max test circuit 3 channel on leakage i d , i s ( on) 0.01 0.01 na typ v s = v d = 1 v or 3 v; test circuit 4 20 0.1 0.75 na max digital inputs input high voltage, v inh 2.0 2.0 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 0.005 0.005 a typ v in = v inl or v inh 0.1 0.1 a max c in , digital input capacitance 2 2 pf typ d ynamic characteristics 2 t transition 18 18 ns typ r l = 300 , c l = 35 pf; test circuit 5 30 30 ns max v s1 = 2 v/0 v, v s2 = 0 v/2 v break-before-make time delay, t d 88 ns typ r l = 300 , c l = 35 pf 11 ns min v s = 2 v; test circuit 6 t on (en) 18 18 ns typ r l = 300 , c l = 35 pf 30 30 ns max v s = 2 v; test circuit 7 t off (en) 8 8 ns typ r l = 300 , c l = 35 pf 15 15 ns max v s = 2 v; test circuit 7 charge injection 3 3pc typ v s = 1.5 v, r s = 0 , c l = 1 nf; test circuit 8 off isolation e60 e60 db typ r l = 50 , c l = 5 pf, f = 10 mhz e80 e80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; test circuit 9 channel-to-channel crosstalk e60 e60 db typ r l = 50 , c l = 5 pf, f = 10 mhz e80 e80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; test circuit 10 e3 db bandwidth 55 55 mhz typ r l = 50 , c l = 5 pf; test circuit 11 c s (off) 13 13 pf typ f = 1 mhz c d (off) adg708 85 85 pf typ f = 1 mhz ADG709 42 42 pf typ f = 1 mhz c d , c s (on) adg708 96 96 pf typ f = 1 mhz ADG709 48 48 pf typ f = 1 mhz power requirements v dd = 3.3 v i dd 0.001 0.001 a typ digital inputs = 0 v or 3.3 v 1.0 1.0 a max notes 1 temperature ranges are as follows: b and c versions: e40 c to +85 c. 2 guaranteed by design, not subject to production test. specitcations subject to change without notice.
rev. a ?4? adg708/ADG709especifications 1 dual supply b version c version e40 c e40 c parameter +25 c to +85 c +25 c to +85 cu nit test conditions/comments analog switch analog signal range v ss to v dd v ss to v dd v on resistance (r on ) 2.5 2.5 typ v s = v ss to v dd , i ds = 10 ma; 4.5 5 4.5 5 max test circuit 1 on resistance match between 0.4 0.4 typ channels ( r on )0.80.8 max v s = v ss to v dd , i ds = 10 ma on resistance flatness (r flat(on) ) 0.6 0.6 typ v s = v ss to v dd , i ds = 10 ma 1.0 1.0 max leakage currents v dd = +2.75 v, v ss = e2.75 v source off leakage i s (off) 0.01 0.01 na typ v s = +2.25 v/e1.25 v, v d = e1.25 v/+2.25 v; 20 0.1 0.3 na max test circuit 2 drain off leakage i d (off) 0.01 0.01 na typ v s = +2.25 v/e1.25 v, v d = e1.25 v/+2.25 v; 20 0.1 0.75 na max test circuit 3 channel on leakage i d , i s (on) 0.01 0.01 na typ v s = v d = +2.25 v/e1.25 v; test circuit 4 20 0.1 0.75 na max digital inputs input high voltage, v inh 1.7 1.7 v min input low voltage, v inl 0.7 0.7 v max input current i inl or i inh 0.005 0.005 a typ v in = v inl or v inh 0.1 0.1 a max c in , digital input capacitance 2 2 pf typ dynamic characteristics 2 t transition 14 14 ns typ r l = 300 , c l = 35 pf; test circuit 5 25 25 ns max v s = 1.5 v/0 v; test circuit 5 break-before-make time delay, t d 88 ns typ r l = 300 , c l = 35 pf 11 ns min v s = 1.5 v; test circuit 6 t on (en) 14 14 ns typ r l = 300 , c l = 35 pf 25 25 ns max v s = 1.5 v; test circuit 7 t off (en) 8 8 ns typ r l = 300 , c l = 35 pf 15 15 ns max v s = 1.5 v; test circuit 7 charge injection 3 3 pc typ v s = 0 v, r s = 0 , c l = 1 nf; test circuit 8 off isolation e60 e60 db typ r l = 50 , c l = 5 pf, f = 10 mhz e80 e80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; test circuit 9 channel-to-channel crosstalk e60 e60 db typ r l = 50 , c l = 5 pf, f = 10 mhz e80 e80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; test circuit 10 e3 db bandwidth 55 55 mhz typ r l = 50 , c l = 5 pf; test circuit 11 c s (off) 13 13 pf typ f = 1 mhz c d (off) adg708 85 85 pf typ f = 1 mhz ADG709 42 42 pf typ f = 1 mhz c d , c s (on) adg708 96 96 pf typ f = 1 mhz ADG709 48 48 pf typ f = 1 mhz power requirements v dd = 2.75 v i dd 0.001 0.001 a typ digital inputs = 0 v or 2.75 v 1.0 1.0 a max i ss 0.001 0.001 a typ v ss = e2.75 v 1.0 1.0 a max digital inputs = 0 v or 2.75 v notes 1 temperature range is as follows: b and c versions: e40 c to +85 c. 2 guaranteed by design, not subject to production test. specitcations subject to change without notice. (v dd = +2.5 v 10%, v ss = e2.5 v 10%, gnd = 0 v, unless otherwise noted.)
rev. a adg708/ADG709 ?5? absolute maximum ratings 1 (t a = 25 c, unless otherwise noted.) v dd to v ss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 v v dd to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . e0.3 v to +7 v v ss to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 v to e3.5 v analog inputs 2 . . . . . . . . . . . . . . v ss e 0.3 v to v dd + 0.3 v or 30 ma, whichever occurs first digital inputs 2 . . . . . . . . . . . . . . . . . e0.3 v to v dd + 0.3 v or 30 ma, whichever occurs first peak current, s or d . . . . . . . . . . . . . . . . . . . . . . . . . . 100 ma (pulsed at 1 ms, 10% duty cycle max) continuous current, s or d . . . . . . . . . . . . . . . . . . . . . 30 ma operating temperature range industrial (b and c versions) . . . . . . . . . . e40 c to +85 c storage temperature range . . . . . . . . . . . . e65 c to +150 c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150 c tssop package, power dissipation . . . . . . . . . . . . . 432 mw ja thermal impedance . . . . . . . . . . . . . . . . . . . 150.4 c/w jc thermal impedance . . . . . . . . . . . . . . . . . . . . 27.6 c/w lead temperature, soldering vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specitcation is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating may be applied at any one time. 2 overvoltages at a, en, s, or d will be clamped by internal diodes. current should be limited to the maximum ratings given. table i. adg708 truth table a2 a1 a0 en switch condition xxx 0 none 00011 00112 01013 01114 10015 10116 11017 11118 x = don?t care table ii. ADG709 truth table a1 a0 en on switch pair xx 0 none 0011 0112 1013 1114 x = don?t care ordering guide model temperature range package description package option adg708bru e40 c to +85 c 16-lead thin shrink small outline package (tssop) ru-16 ADG709bru e40 c to +85 c 16-lead thin shrink small outline package (tssop) ru-16 adg708cru e40 c to +85 c 16-lead thin shrink small outline package (tssop) ru-16 ADG709cru e40 c to +85 c 16-lead thin shrink small outline package (tssop) ru-16 pin configurations tssop a0 en s2 s3 s4 v ss s1 d 1 2 16 15 5 6 7 12 11 10 3 4 14 13 8 9 top view (not to scale) adg708 a1 a2 s5 s6 s7 gnd v dd s8 a0 en s2a s3a s4a v ss s1a da 1 2 16 15 5 6 7 12 11 10 3 4 14 13 8 9 top view (not to scale) ADG709 a1 gnd s2b s3b s4b v dd s1b db caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the adg708/ADG709 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device
rev. a adg708/ADG709 ?6? terminology v dd most positive power supply potential v ss m ost negative power supply in a dual-supply application. in single-supply applications, this should be tied to ground at the device. gnd ground (0 v) reference s source terminal. may be an input or output. dd rain terminal. may be an input or output. ax logic control input en active high enable r on ohmic resistance between d and s r flat(on) flatness is detned as the difference between the maximum and minimum value of on resistance as measured over the specited analog signal range. i s (off) source leakage current with the switch off i d (off) drain leakage current with the switch off i d , i s (on) channel leakage current with the switch on v d (v s )a nalog voltage on terminals d and s c s (off) off switch source capacitance. measured with reference to ground. c d (off) off switch drain capacitance. measured w ith reference to ground. c d , c s (on) on switch capacitance. measured with reference to ground. c in digital input capacitance t transition delay time measured between the 50% and 90% points of the digital inputs and the switch on condition when switching from one address state to another. t on (en) delay time between the 50% and 90% points of the en digital input and the switch on condition. t off (en) delay time between the 50% and 90% points of the en digital input and the switch off condition. t open off time measured between the 80% points of both switches when switching from one a ddress state to another. off isolation a measure of unwanted signal coupling through an off switch. crosstalk a measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance. charge a measure of the glitch impulse transferred from injection of the digital input to the analog output during switching. bandwidth the frequency at which the output is attenuated by 3 dbs on response the frequency response of the on switch on loss the loss due to the on resistance of the switch v inl maximum input voltage for logic 0 v inh minimum input voltage for logic 1 i inl (i inh ) input current of the digital input i dd positive supply current i ss negative supply current
rev. a adg708/ADG709 ?7? t ypical performance characteristicse v d or v s e drain or source voltage e v 8 01 2345 t a = 25 c v ss = 0v 7 6 5 4 3 2 1 0 on resistance e v dd = 2.7v v dd = 3.3v v dd = 4.5v v dd = 5.5v tpc 1. on resistance as a function of v d (v s ) for single supply v d or v s e drain or source voltage e v 8 e3.0 t a = 25 c 7 6 5 4 3 2 0 on resistance e e2.5 e2.0 e1.5 e1.0 e0.5 1.0 1.5 2.0 2.5 3.0 0.5 0 v dd = +2.25v v ss = e2.25v v dd = +2.75v v ss = e2.75v 1 tpc 2. on resistance as a function of v d (v s ) for dual supply v d or v s e drain or source voltage e v 0123 45 7 6 5 4 3 2 1 0 on resistance e +85 c +25 c e40 c v dd = 5v v ss = 0v 8 tpc 3. on resistance as a function of v d (v s ) for differ- ent temperatures, single supply v d or v s e drain or source voltage e v 0 0.5 7 6 5 4 3 2 1 0 on resistance e v dd = 3v v ss = 0v 1.0 1.5 2.0 2.5 3.0 e40 c +25 c +85 c 8 tpc 4. on resistance as a function of v d (v s ) for differ- ent temperatures, single supply v d or v s e drain or source voltage e v 7 6 5 4 3 2 1 0 on resistance e e3.0 e2.5 e2.0 e1.5 e1.0 1.0 1.5 2.0 2.5 0.5 0 v dd = +2.5v v ss = e2.5v +85 c +25 c e40 c 3.0 8 e0.5 tpc 5. on resistance as a function of v d (v s ) for differ- ent temperatures, dual supply v s , (v d = v dd e v s ) e v 01 0.12 current e na 2345 v dd = 5v v ss = 0v t a = 25 c 0.08 0.04 0.00 e0.04 e0.08 e0.12 i d (on) i s (off) i d (off) tpc 6. leakage currents as a function of v d (v s )
rev. a adg708/ADG709 ?8? v d , (v s = v dd e v d ) e v 0 0.5 0.12 current e na 1.0 1.5 2.0 3.0 v dd = 3v v ss = 0v t a = 25 c 0.08 0.04 0.00 e0.04 e0.08 e0.12 2.5 i d (on) i s (off) i d (off) tpc 7. leakage currents as a function of v d (v s ) e3.0 0.12 current e na v dd = +2.5v v ss = e2.5v t a = 25 c 0.08 0.04 0.00 e0.04 e0.08 e0.12 e2.5 e2.0 e1.5 e1.0 0 0.5 1.0 1.5 2.0 2.5 i s (off) i d (off) e0.5 3.0 v s , (v d = v dd e v s ) e v i d (on), v s = v d tpc 8. leakage currents as a function of v d (v s ) temperature e c 15 current e na v dd = 5v v ss = 0v and v dd = +2.5v v ss = e2.5v e0.05 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 25 35 45 55 65 75 85 i d (on) i s (off) i d (off) tpc 9. leakage currents as a function of temperature temperature e c 15 current e na v dd = 3v v ss = 0v e0.05 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 25 35 45 55 65 75 85 i d (on) i s (off) i d (off) tpc 10. leakage currents as a function of temperature frequency e hz 10m 10 current e a 1m 100 10 1 100n 10n 1n 100 1k 10k 100k 1m 10m t a = 25 c v dd = +2.5v v ss = e2.5v v dd = 3v v dd = 5v tpc 11. supply current vs. input switching frequency frequency e hz 0 30k attenuation e db e20 e40 e60 e80 e100 e120 100k 1m 10m 100m v dd = 5v t a = 25 c tpc 12. off isolation vs. frequency
rev. a adg708/ADG709 ?9? frequency e hz 0 30k attenuation e db e20 e40 e60 e80 e100 e120 100k 1m 10m 100m v dd = 5v t a = 25 c tpc 13. crosstalk vs. frequency frequency e hz 0 30k attenuation e db e5 100k 1m 10m 100m e10 e15 e20 v dd = 5v t a = 25 c tpc 14. on response vs. frequency voltage e v e3 e2 20 q inj e pc e1 1 2 5 t a = 25 c 10 0 e10 e20 e40 3 e30 04 v dd = 3v v ss = 0v v dd = +2.5v v ss = e2.5v v dd = 5v v ss = 0v tpc 15. charge injection vs. source voltage
rev. a adg708/ADG709 ?10? t est circuits r on = v 1 /i ds v s v1 i ds d s test circuit 1. on resistance v d a 0.8v d i s (off) v ss v dd v ss v dd s1 s2 s8 en gnd v s test circuit 2. i s (off) v s a 0.8v d i d (off) v ss v dd v ss v dd s1 s2 s8 en gnd v d test circuit 3. i d (off) a 2.4v d i d (on) v ss v dd v ss v dd s1 s8 en gnd v d v s test circuit 4. i d (on) v s8 3v 50% t transition 90% 90% address drive (v in ) 50% 0v v s1 v out t transition a2 d * similar connection for ADG709 a1 a0 en gnd adg708 * s1 s8 s2 thru s7 v in 2.4v 50 35pf v dd v ss v dd v ss v s1 v s8 300 r l c l v out test circuit 5. switching time of multiplexer, t transition t open 3v 80% 80% address drive (v in ) 0v v out a2 d * similar connection for ADG709 a1 a0 en gnd adg708 * s1 s8 s2 thru s7 v in 2.4v 50 35pf v dd v ss v dd v ss v s 300 r l c l v out test circuit 6. break-before-make delay, t open
rev. a adg708/ADG709 ?11? output 3v 50% enable drive (v in ) 50% 0v v 0 t on (en) 0v 0.9v 0 0.9v 0 t off (en) a2 d * similar connection for ADG709 a1 a0 en gnd adg708 * s1 s2 thru s8 v in 35pf v dd v ss v dd v ss v s 300 r l c l v out 50 test circuit 7. enable delay, t on (en), t off (en) logic input (v in ) 3v 0v v out q inj = c l v out v out a2 v out v dd d a1 a0 en gnd adg708 * c l 1nf v dd s v in r s v ss v ss v s * similar connection for ADG709 test circuit 8. charge injection v s v out 50 network analyzer r l 50 gnd s d v s off isolation = 20 log v out 0.1 f v dd a2 a1 a0 en 2.4v 0.1 f v ss v dd v ss 50 test circuit 9. off isolation * similar connection for ADG709 channel-to-channel crosstalk = 20 log v out v s a2 d a1 a0 en gnd adg708 * s1 s2 s8 2.4v network analyzer network analyzer r l 50 v out v dd 0.1 f v ss 0.1 f v dd v ss 50 v s 50 test circuit 10. channel-to-channel crosstalk v s v out 50 network analyzer r l 50 gnd s d v out with switch v out without switch insertion loss = 20 log 0.1 f v dd a2 a1 a0 en 2.4v 0.1 f v ss v dd v ss test circuit 11. bandwidth power-supply sequencing when using cmos devices, care must be taken to ensure correct power sup ply sequencing. incorrect power supply sequencing can result in the device being subjected to stresses beyond the maximum ratings listed in the data sheet. digital and analog inputs should always be applied after power supplies and ground. for single-supply opera- tion, v ss should be tied to gnd as close to the device as possible.
rev. a C12C c00041C0C5/02(a) printed in u.s.a. adg708/ADG709 outline dimensions dimensions shown in inches and (mm). 16-lead tssop (ru-16) 16 9 8 1 0.201 (5.10) 0.193 (4.90) 0.256 (6.50) 0.246 (6.25) 0.177 (4.50) 0.169 (4.30) pin 1 seating plane 0.006 (0.15) 0.002 (0.05) 0.0118 (0.30) 0.0075 (0.19) 0.0256 (0.65) bsc 0.0433 (1.10) max 0.0079 (0.20) 0.0035 (0.090) 0.028 (0.70) 0.020 (0.50) 8 0 revision history location page 4/02data sheet changed from rev. 0 to rev. a. edits to features and product highlights . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 change to specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 edits to absolute maximum ratings notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 edits to tpcs 2, 5, 6?, 11, and 15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 edits to test circuits 9 and 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 addition of test circuit 11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

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